MIPS Reference
MIPS instruction set reference with machine code format diagrams
Instruction Formats
MIPS uses three instruction formats. All instructions are 32 bits wide.
R-Type (Register)
opcode
6 bits
[31:26]
rs
5 bits
[25:21]
rt
5 bits
[20:16]
rd
5 bits
[15:11]
shamt
5 bits
[10:6]
funct
6 bits
[5:0]
Used for arithmetic, logical, and shift operations between registers.
I-Type (Immediate)
opcode
6 bits
[31:26]
rs
5 bits
[25:21]
rt
5 bits
[20:16]
immediate
16 bits
[15:0]
Used for immediate arithmetic, load/store, and branch operations.
J-Type (Jump)
opcode
6 bits
[31:26]
address
26 bits
[25:0]
Used for jump instructions (j, jal).
Notes
(1) May cause overflow exception
(2) SignExtImm = { 16{ immediate[15] }, immediate }
(3) ZeroExtImm = { 16{ 1'b0 }, immediate }
(4) BranchAddr = { 14{ immediate[15] }, immediate, 2'b0 }
(5) JumpAddr = { PC+4[31:28], address, 2'b0 }
(6) Lots of unsigned operations still sign-extend the immediate
Machine Code Translator
Select an instruction above to translate it to 32-bit machine code.
Instruction Reference
| Name | Mnemonic | Format | Assembly | Operation | Opcode | Funct |
|---|---|---|---|---|---|---|
| Add | add | R | add $rd, $rs, $rt | R[rd]=R[rs]+R[rt]; PC=PC+4 | 0 | 20hex |
| Add Immediate | addi | I | addi $rt, $rs, imm | R[rt]=R[rs]+SignExtImm; PC=PC+4 | 8hex | - |
| Add Imm Unsigned | addiu | I | addiu $rt, $rs, imm | R[rt]=R[rs]+SignExtImm; PC=PC+4 | 9hex | - |
| Add Unsigned | addu | R | addu $rd, $rs, $rt | R[rd]=R[rs]+R[rt]; PC=PC+4 | 0 | 21hex |
| And | and | R | and $rd, $rs, $rt | R[rd]=R[rs] & R[rt]; PC=PC+4 | 0 | 24hex |
| And Immediate | andi | I | andi $rt, $rs, imm | R[rt]=R[rs] & ZeroExtImm; PC=PC+4 | chex | - |
| Branch on Equal | beq | I | beq $rs, $rt, imm | if(R[rs]==R[rt]) PC=PC+4+BranchAddr else PC=PC+4 | 4hex | - |
| Branch on Not Equal | bne | I | bne $rs, $rt, imm | if(R[rs]!=R[rt]) PC=PC+4+BranchAddr else PC=PC+4 | 5hex | - |
| Jump | j | J | j address | PC=JumpAddr | 2hex | - |
| Jump and Link | jal | J | jal address | R[31]=PC+4; PC=JumpAddr | 3hex | - |
| Jump Register | jr | R | jr $rs | PC=R[rs] | 0 | 08hex |
| Load Byte | lb | I | lb $rt, imm($rs) | R[rt]=SignExt(M[R[rs]+SignExtImm](7:0)); PC=PC+4 | 20hex | - |
| Load Byte Unsigned | lbu | I | lbu $rt, imm($rs) | R[rt]=ZeroExt(M[R[rs]+SignExtImm](7:0)); PC=PC+4 | 24hex | - |
| Load Halfword | lh | I | lh $rt, imm($rs) | R[rt]=SignExt(M[R[rs]+SignExtImm](15:0)); PC=PC+4 | 21hex | - |
| Load Halfword Unsigned | lhu | I | lhu $rt, imm($rs) | R[rt]=ZeroExt(M[R[rs]+SignExtImm](15:0)); PC=PC+4 | 25hex | - |
| Load Upper Immediate | lui | I | lui $rt, imm | R[rt]={imm, 16'b0}; PC=PC+4 | fhex | - |
| Load Word | lw | I | lw $rt, imm($rs) | R[rt]=M[R[rs]+SignExtImm]; PC=PC+4 | 23hex | - |
| Move From Coproc 0 | mfc0 | R | mfc0 $rt, $rd | R[rt]=CPR[0,rd]; PC=PC+4 | 10hex | 0 |
| Move To Coproc 0 | mtc0 | R | mtc0 $rt, $rd | CPR[0,rd]=R[rt]; PC=PC+4 | 10hex | 0 |
| Nor | nor | R | nor $rd, $rs, $rt | R[rd]=~(R[rs] | R[rt]); PC=PC+4 | 0 | 27hex |
| Or | or | R | or $rd, $rs, $rt | R[rd]=R[rs] | R[rt]; PC=PC+4 | 0 | 25hex |
| Or Immediate | ori | I | ori $rt, $rs, imm | R[rt]=R[rs] | ZeroExtImm; PC=PC+4 | dhex | - |
| Set Less Than | slt | R | slt $rd, $rs, $rt | R[rd]=(R[rs]<R[rt]) ? 1 : 0; PC=PC+4 | 0 | 2ahex |
| Set Less Than Imm | slti | I | slti $rt, $rs, imm | R[rt]=(R[rs]<SignExtImm) ? 1 : 0; PC=PC+4 | ahex | - |
| Set Less Than Imm Uns | sltiu | I | sltiu $rt, $rs, imm | R[rt]=(R[rs]<SignExtImm) ? 1 : 0; PC=PC+4 | bhex | - |
| Set Less Than Unsigned | sltu | R | sltu $rd, $rs, $rt | R[rd]=(R[rs]<R[rt]) ? 1 : 0; PC=PC+4 | 0 | 2bhex |
| Shift Left Logical | sll | R | sll $rd, $rt, shamt | R[rd]=R[rt]<<shamt; PC=PC+4 | 0 | 00hex |
| Shift Right Arithmetic | sra | R | sra $rd, $rt, shamt | R[rd]=R[rt]>>shamt (arithmetic); PC=PC+4 | 0 | 03hex |
| Shift Right Logical | srl | R | srl $rd, $rt, shamt | R[rd]=R[rt]>>shamt (logical); PC=PC+4 | 0 | 02hex |
| Store Byte | sb | I | sb $rt, imm($rs) | M[R[rs]+SignExtImm](7:0)=R[rt](7:0); PC=PC+4 | 28hex | - |
| Store Halfword | sh | I | sh $rt, imm($rs) | M[R[rs]+SignExtImm](15:0)=R[rt](15:0); PC=PC+4 | 29hex | - |
| Store Word | sw | I | sw $rt, imm($rs) | M[R[rs]+SignExtImm]=R[rt]; PC=PC+4 | 2bhex | - |
| Subtract | sub | R | sub $rd, $rs, $rt | R[rd]=R[rs]-R[rt]; PC=PC+4 | 0 | 22hex |
| Subtract Unsigned | subu | R | subu $rd, $rs, $rt | R[rd]=R[rs]-R[rt]; PC=PC+4 | 0 | 23hex |
| Xor | xor | R | xor $rd, $rs, $rt | R[rd]=R[rs]^R[rt]; PC=PC+4 | 0 | 26hex |
| Xor Immediate | xori | I | xori $rt, $rs, imm | R[rt]=R[rs]^ZeroExtImm; PC=PC+4 | ehex | - |
36 instructions shown